The disclosure relates generally to circuits and methods to backup state information in integrated circuits and more particularly to circuits and methods that save the state of the processor or logic chip and methods for performing same.
Logic chips and processors such as central processing units (CPUs), graphics processing units (GPUs), DSPs and other processing circuits in servers and other devices employ known solutions to save the state information that are in various locations throughout the processor when, for example, power is to be shut down on the device or for switching to handle different processing threads or for other suitable purposes. Flip-flops as known in the art may be used in pipelines to store state information and may be used, for example, in state machines or any other suitable structure to allow devices to start and stop when power is to be removed, for example or if a pipeline is to be temporarily held to allow another thread to be processed. Saving the state of the processor can involve the tedious process of reading all of the architected states of the chip (or part of the chip) that is to be powered off and saved out to a section of the chip not to be powered off or power gated. Other solutions utilize the writing of the state of the chip onto an off-chip non-volatile storage device through a system bus. The off-chip memory retains the data after power has been removed, such as a ROM disk or other non-volatile storage.
FIG. 1 illustrates one example of a prior art device 100 that employs a chip or system bus 102 that communicate with a non-volatile disk memory 104 (e.g., hard drive) or other storage 106. An integrated circuit chip 108 (e.g., die or packaged die) may be connected to the disk memory 104 via the chip or system bus 102. The integrated circuit chip 108 may include, for example, an input/output stage 110, cache memory 112, register files 114 and one or more execution units 116. Control logic 118 provides control of the various stages to effect processing. Active memory circuits (e.g., that are made from CMOS transistors or other active memory structures) in the form of flip-flops 120, for example, may be used to store information throughout the integrated circuit as well. Other memory circuits such as the register file, as known in the art, may store state elements for computations for the execution unit. The flip-flops 120 store states of the processor and the cache memory 112 may be SRAM cache or other suitable volatile memory cache. Memory circuits such as flip-flops, registers, register files, SRAM and other memory circuits that store state information can be quite voluminous particularly in complex processors such as CPUs, GPUs and other processors. Memory circuits as used herein include, for example, active memory circuits that employ, for example, active transistors such as CMOS transistors or other suitable active devices. The flip-flops 120 may be connected to scan chains that are used for testing the integrated circuit prior to packaging and may also be used to scan out state information from various circuits in the chip prior to power down as known in the art. The scan chains may typically operate at a low frequency such as 100 MHz and typically scan out state data in a serialized fashion which can take an inordinate amount of time. The state information may be saved onto the non-volatile disk 104. Once stored, power to the section of the chip or system can be removed. This is sometimes referred to as power gating.
To restore the state, the reverse process is executed. The section of the chip, entire chip or system is powered up and the state is restored to its previous state from the save location and execution is resumed from the previous store point. Such state saving techniques can require significant amounts of power to save and restore the state of entire sections of a chip, the entire chip or system. This can defeat the purpose of power gating in an integrated circuit which allows the reduction or removal of power from subsections or portions of the chip to save power when they are not in use or otherwise slow down the operation to conserve power. Such power gating is useful for mobile devices for example. Such power gated integrated circuits may be used, for example, in handheld devices such as smart phones, laptops, tablet devices or any other suitable mobile devices. Energy efficiency is becoming more commonplace in non-mobile devices as well.
It is also known in the art to use shadow flip-flops that are active circuits that are connected to active flip-flops to attempt to save state. However, shadow flip-flops are typically connected to a separate supply voltage to keep the flip-flop on during power gating so that the data is not lost. This results in additional leakage current from the many shadow flip-flops that are employed to save state, drawing unnecessary power and adding unnecessary temperature increases.
Also, servers and other apparatus employ integrated circuits that store system state information for differing virtual machines wherein each virtual machine is used by a different operating system instance or operating system. A hypervisor, as known in the art, is a virtual machine monitor that may be a piece of executing software that performs hardware platform virtualization that allows multiple operating systems to run on a host computer concurrently. Such systems may save state information and restore state information depending upon a virtual machine operation. However, such state saving technology can result in a laborious process. For example, storing a system may involve flushing a processing pipe, achieving a stable state and explicitly storing the state into off-chip persistent memory such as flash memory or onto an off-chip persistent memory in the form of a hard drive. This process may consume dozens of cycles of flushing the processing pipe and hundreds more cycles saving the associated state information. This assumes that the system switching can occur within the same operating system context. If a system with operating system contexts must also be stored to invoke a new system, then the delay can be even larger.
There is also a reliability mechanism called check pointing, which is used to save system state in order to provide a restart operation point if a program execution fails. The check point provides a restart point that is in many ways another version of a stored context or virtual system.
As noted above, one or more processor execution pipelines execute instructions and access the register file to save intermediate information or final information from the execution pipeline. Other miscellaneous architectural state information may be distributed throughout the integrated circuit such as in registers or flip-flops that store various information. A memory controller allows the processor execution pipeline to save and restore state information to/from off-chip flash memory or hard drive which is a persistent memory store of state information programs and data information depending upon the device or system. If the data is to be stored to off-chip persistent memory, the memory controller may store the cached state information to off-chip memory. The state store operation which may employ, for example, special software, typically stores the state information bit by bit which can be a slow lengthy process using the memory controller. The use of the off-chip persistent flash memory typically has slow write characteristics and storing the state information can add an undesirable delay when an integrated circuit is to be awakened from a sleep state or when entering a sleep state. Also, slow switching between virtual machines and storing state information in off-chip persistent memory can have an adverse impact on processor performance.
Accordingly, a need exists for an improved processor state store and restore method and apparatus.